PIC16C62X
FIGURE 12-14:
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
TIMER TIMING
VDD
MCLR
Internal
POR
PWRT
Timeout
OSC
Timeout
Internal
RESET
Watchdog
Timer
RESET
I/O Pins
33
32
30
31
34
34
FIGURE 12-15: BROWN-OUT RESET TIMING
VDD
BVDD
35
TABLE 12-5: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
TIMER REQUIREMENTS
Parameter
No.
Sym
Characteristic
Min
Typ†
Max Units
Conditions
30
TmcL MCLR Pulse Width (low)
2000
—
31
Twdt
Watchdog Timer Time-out Period
7*
18
(No Prescaler)
—
ns -40° to +85°C
33* ms VDD = 5.0V, -40° to +85°C
32
Tost
Oscillation Start-up Timer Period
— 1024 TOSC —
— TOSC = OSC1 period
33
Tpwrt Power-up Timer Period
28*
72
132* ms VDD = 5.0V, -40° to +85°C
34
TIOZ
I/O hi-impedance from MCLR low
—
2.0 µs
35
TBOR Brown-out Reset Pulse Width
100*
—
—
µs 3.7V ≤ VDD ≤ 4.3V
*
These parameters are characterized but not tested.
†
Data in "Typ" column is at 5.0V, 25°C, unless otherwise stated. These parameters are for design guidance only and are
not tested.
2003 Microchip Technology Inc.
DS30235J-page 107