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ST72521AR7TC 查看數據表(PDF) - STMicroelectronics

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ST72521AR7TC Datasheet PDF : 199 Pages
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ST72521M/R/AR
SUPPLY CURRENT CHARACTERISTICS (Cont’d)
12.4.2 WAIT and SLOW WAIT Modes (Flash devices)
Symbol
Parameter
Supply current in WAIT mode 2)
(see Figure 81)
IDD
Supply current in SLOW WAIT mode 2)
(see Figure 82)
Conditions
fOSC=2MHz, fCPU=1MHz
fOSC=4MHz, fCPU=2MHz
fOSC=8MHz, fCPU=4MHz
fOSC=16MHz, fCPU=8MHz
fOSC=2MHz, fCPU=62.5kHz
fOSC=4MHz, fCPU=125kHz
fOSC=8MHz, fCPU=250kHz
fOSC=16MHz, fCPU=500kHz
Typ Max 1) Unit
1.0
3.0
1.5
2.5
4.0
5.0
mA
4.5
7.0
0.58 1.2
0.65 1.3
0.77 1.8
mA
1.05 2.0
Figure 81. Typical IDD in WAIT vs. fCPU
Figure 82. Typical IDD in SLOW-WAIT vs. fCPU
6
8MHz
4MHz
5
2MHz
1MHz
4
3
2
1
0
3.2
3.6
4
4.4
4.8
5.2
5.5
Vdd (V)
1.20
500kHz
250kHz
1.00
125kHz
62.5kHz
0.80
0.60
0.40
0.20
0.00
3.2
3.6
4
4.4
4.8
5.2
5.5
Vdd (V)
Notes:
1. Data based on characterization results, tested in production at VDD max. and fCPU max.
2. Measurements are done in the following conditions:
- Progam executed from RAM, CPU running with RAM access. The increase in consumption when executing from Flash
is 50%.
- All I/O pins in input mode with a static value at VDD or VSS (no load)
- All peripherals in reset state.
- CSS and LVD disabled.
- Clock input (OSC1) driven by external square wave.
- In SLOW and SLOW WAIT mode, fCPU is based on fOSC divided by 32.
To obtain the total current consumption of the device, add the clock source (Section 12.5.3 and Section 12.5.4) and the
peripheral power consumption (Section 12.4.7).
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