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PIC12CE519T-04 查看數據表(PDF) - Microchip Technology

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PIC12CE519T-04
Microchip
Microchip Technology 
PIC12CE519T-04 Datasheet PDF : 113 Pages
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PIC12C5XX
FIGURE 7-3: DATA TRANSFER SEQUENCE ON THE SERIAL BUS
SCL (A)
(B)
(C)
(D)
SDA
START
CONDITION
ADDRESS OR
ACKNOWLEDGE
VALID
DATA
ALLOWED
TO CHANGE
(C) (A)
STOP
CONDITION
FIGURE 7-4: ACKNOWLEDGE TIMING
Acknowledge
Bit
SCL
12 345678 9 123
SDA
Data from transmitter
Transmitter must release the SDA line at this point
allowing the Receiver to pull the SDA line low to
acknowledge the previous eight bits of data.
Data from transmitter
Receiver must release the SDA line at this point
so the Transmitter can continue sending data.
7.2 Device Addressing
After generating a START condition, the bus master
transmits a control byte consisting of a slave address
and a Read/Write bit that indicates what type of opera-
tion is to be performed. The slave address consists of
a 4-bit device code (1010) followed by three don’t care
bits.
The last bit of the control byte determines the operation
to be performed. When set to a one a read operation is
selected, and when set to a zero a write operation is
selected. (Figure 7-5). The bus is monitored for its cor-
responding slave address all the time. It generates an
acknowledge bit if the slave address was true and it is
not in a programming mode.
FIGURE 7-5: CONTROL BYTE FORMAT
Read/Write Bit
Device Select
Bits
Don’t Care
Bits
S 1 0 1 0 X X X R/W ACK
Start Bit
Slave Address
Acknowledge Bit
DS40139E-page 32
© 1999 Microchip Technology Inc.

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