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PIC16CR64T-04/PQ 查看數據表(PDF) - Microchip Technology

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PIC16CR64T-04/PQ
Microchip
Microchip Technology 
PIC16CR64T-04/PQ Datasheet PDF : 336 Pages
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PIC16C6X
Steps to follow when setting up an Asynchronous
Reception:
1. Initialize the SPBRG register for the appropriate
baud rate. If a high speed baud rate is desired,
set bit BRGH (Section 12.1).
2. Enable the asynchronous serial port by clearing
bit SYNC and setting bit SPEN.
3. If interrupts are desired, then set enable bit
RCIE.
4. If 9-bit reception is desired, then set bit RX9.
5. Enable the reception by setting enable bit
CREN.
6. Flag bit RCIF will be set when reception is com-
plete, and an interrupt will be generated if
enable bit RCIE was set.
7. Read the RCSTA register to get the ninth bit (if
enabled) and determine if any error occurred
during reception.
8. Read the 8-bit received data by reading the
RCREG register.
9. If any error occurred, clear the error by clearing
enable bit CREN.
TABLE 12-7: REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
Address Name
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2
Bit 1
Bit 0
Value on
POR,
BOR
Value on
all other
Resets
0Ch
PIR1
PSPIF(1) (2) RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
18h
RCSTA SPEN RX9 SREN CREN — FERR OERR RX9D 0000 -00x 0000 -00x
1Ah
RCREG USART Receive Register
0000 0000 0000 0000
8Ch
PIE1
PSPIE(1) (2) RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
98h
TXSTA CSRC TX9 TXEN SYNC — BRGH TRMT TX9D 0000 -010 0000 -010
99h
SPBRG Baud Rate Generator Register
0000 0000 0000 0000
Legend: x = unknown, - = unimplemented locations read as '0'. Shaded cells are not used for Asynchronous Reception.
Note 1: PSPIE and PSPIF are reserved on the PIC16C63/R63/66, always maintain these bits clear.
2: PIE1<6> and PIR1<6> are reserved, always maintain these bits clear.
© 1997 Microchip Technology Inc.
DS30234D-page 115

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