PIC16C6X
Applicable Devices 61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
22.1 DC Characteristics: PIC16CR63/R65-04 (Commercial, Industrial)
PIC16CR63/R65-10 (Commercial, Industrial)
PIC16CR63/R65-20 (Commercial, Industrial)
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40˚C ≤ TA ≤ +85˚C for industrial and
0˚C ≤ TA ≤ +70˚C for commercial
Param
No.
Characteristic
Sym Min Typ† Max Units
Conditions
D001 Supply Voltage
D001A
VDD 4.0 - 5.5 V XT, RC and LP osc configuration
4.5 - 5.5 V HS osc configuration
D002* RAM Data Retention
Voltage (Note 1)
VDR
- 1.5 - V
D003
VDD start voltage to
ensure internal Power-on
Reset signal
VPOR
- VSS -
V See section on Power-on Reset for details
D004* VDD rise rate to ensure SVDD 0.05 -
internal Power-on Reset
signal
- V/ms See section on Power-on Reset for details
D005 Brown-out Reset Voltage BVDD 3.7 4.0 4.3 V BODEN configuration bit is enabled
D010 Supply Current (Note 2, 5) IDD
- 2.7 5 mA XT, RC, osc config FOSC = 4 MHz,
VDD = 5.5V (Note 4)
D013
- 10 20 mA HS osc config
FOSC = 20 MHz, VDD = 5.5V
D015* Brown-out Reset Current ∆IBOR - 350 425 µA BOR enabled, VDD = 5.0V
(Note 6)
D020 Power-down Current
IPD
- 10.5 42 µA VDD = 4.0V, WDT enabled,-40°C to +85°C
D021 (Note 3, 5)
- 1.5 16 µA VDD = 4.0V, WDT disabled,-0°C to +70°C
D021A
- 1.5 19 µA VDD = 4.0V, WDT disabled,-40°C to +85°C
D023* Brown-out Reset Current ∆IBOR - 350 425 µA BOR enabled, VDD = 5.0V
(Note 6)
* These parameters are characterized but not tested.
† Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only
and are not tested.
Note 1: This is the limit to which VDD can be lowered without losing RAM data.
2: The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin
loading and switching rate, oscillator type, internal code execution pattern, and temperature also have an
impact on the current consumption.
The test conditions for all IDD measurements in active operation mode are:
OSC1 = external square wave, from rail to rail; all I/O pins tristated, pulled to VDD,
MCLR = VDD; WDT enabled/disabled as specified.
3: The power down current in SLEEP mode does not depend on the oscillator type. Power-down current is mea-
sured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD and VSS.
4: For RC osc configuration, current through Rext is not included. The current through the resistor can be esti-
mated by the formula Ir = VDD/2Rext (mA) with Rext in kOhm.
5: Timer1 oscillator (when enabled) adds approximately 20 µA to the specification. This value is from character-
ization and is for design guidance only. This is not tested.
6: The ∆ current is the additional current consumed when this peripheral is enabled. This current should be
added to the base IDD or IPD measurement.
DS30234D-page 248
Preliminary
© 1997 Microchip Technology Inc.