PIC16C6X
4.2.2.6 PIE2 REGISTER
Applicable Devices
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
This register contains the CCP2 interrupt enable bit.
FIGURE 4-20: PIE2 REGISTER (ADDRESS 8Dh)
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
bit7
bit 7-1:
bit 0:
Unimplemented: Read as '0'
CCP2IE: CCP2 Interrupt Enable bit
1 = Enables the CCP2 interrupt
0 = Disables the CCP2 interrupt
U-0
R/W-0
—
CCP2IE R = Readable bit
bit0 W = Writable bit
U = Unimplemented bit,
read as ‘0’
- n = Value at POR reset
© 1997 Microchip Technology Inc.
DS30234D-page 45