PIC16LC8X 查看數據表（PDF） - Microchip Technology

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PIC16LC8X

8-Bit CMOS EEPROM Microcontrollers

Microchip Technology 

PIC16C8X

FIGURE 8-16: INTERRUPT LOGIC

T0IF

T0IE

INTF

INTE

RBIF

RBIE

EEIF

EEIE

GIE

Wake-up

(If in SLEEP mode)

Interrupt to CPU

FIGURE 8-17: INT PIN INTERRUPT TIMING

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4

OSC1

CLKOUT 3

4

INT pin

1

INTF flag

5

(INTCON<1>)

GIE bit

(INTCON<7>)

INSTRUCTION FLOW

PC

PC

Instruction

fetched

Inst (PC)

Instruction

executed

Inst (PC-1)

1

Interrupt Latency 2

PC+1

Inst (PC+1)

Inst (PC)

PC+1

—

Dummy Cycle

0004h

Inst (0004h)

Dummy Cycle

0005h

Inst (0005h)

Inst (0004h)

Note 1: INTF flag is sampled here (every Q1).

2: Interrupt latency = 3-4Tcy where Tcy = instruction cycle time.

Latency is the same whether Inst (PC) is a single cycle or a 2-cycle instruction.

3: CLKOUT is available only in RC oscillator mode.

4: For minimum width of INT pulse, refer to AC specs.

5: INTF is enabled to be set anytime during the Q4-Q1 cycles.

DS30081F-page 48

© 1995 Microchip Technology Inc.

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