PIC16CE624T-04SS 查看數據表（PDF） - Microchip Technology
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PIC16CE624T-04SS Datasheet PDF : 113 Pages
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PIC16CE62X
NOP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
No Operation
[ label ] NOP
None
No operation
None
00 0000
No operation.
1
1
NOP
0xx0
0000
OPTION
Load Option Register
Syntax:
[ label ] OPTION
Operands:
None
Operation:
(W) → OPTION
Status Affected: None
Encoding:
00 0000 0110 0010
Description:
The contents of the W register are
loaded in the OPTION register. This
instruction is supported for code
compatibility with PIC16C5X products.
Since OPTION is a readable/writable
register, the user can directly
address it.
Words:
1
Cycles:
1
Example
To maintain upward compatibility
with future PICmicro® products, do
not use this instruction.
RETFIE
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Return from Interrupt
[ label ] RETFIE
None
TOS → PC,
1 → GIE
None
00 0000 0000 1001
Return from Interrupt. Stack is POPed
and Top of Stack (TOS) is loaded in
the PC. Interrupts are enabled by
setting Global Interrupt Enable bit,
GIE (INTCON<7>). This is a two-cycle
instruction.
1
2
RETFIE
After Interrupt
PC = TOS
GIE = 1
RETLW
Return with Literal in W
Syntax:
[ label ] RETLW k
Operands:
0 ≤ k ≤ 255
Operation:
k → (W);
TOS → PC
Status Affected: None
Encoding:
11 01xx kkkk kkkk
Description:
The W register is loaded with the eight
bit literal ’k’. The program counter is
loaded from the top of the stack (the
return address). This is a two-cycle
instruction.
Words:
1
Cycles:
2
Example
CALL TABLE
TABLE
•
value
•
•
ADDWF PC
RETLW k1
RETLW k2
•
•
•
RETLW kn
;W contains table
;offset value
;W now has table
;W = offset
;Begin table
;
; End of table
Before Instruction
W = 0x07
After Instruction
W = value of k8
© 1999 Microchip Technology Inc.
DS40182C-page 73
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