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PIC12F1822T-I/SL 查看數據表(PDF) - Microchip Technology

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PIC12F1822T-I/SL Datasheet PDF : 398 Pages
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PIC12F/LF1822/16F/LF1823
REGISTER 11-6: EECON2: EEPROM CONTROL 2 REGISTER
W-0/0
bit 7
W-0/0
W-0/0
W-0/0
W-0/0
EEPROM Control Register 2
W-0/0
W-0/0
W-0/0
bit 0
Legend:
R = Readable bit
S = Bit can only be set
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
Data EEPROM Unlock Pattern bits
To unlock writes, a 55h must be written first, followed by an AAh, before setting the WR bit of the
EECON1 register. The value written to this register is used to unlock the writes. There are specific
timing requirements on these writes. Refer to Section 11.2.2 “Writing to the Data EEPROM
Memory” for more information.
TABLE 11-3: SUMMARY OF REGISTERS ASSOCIATED WITH DATA EEPROM
Name Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
EECON1 EEPGD CFGS LWLO FREE WRERR WREN
WR
RD
115
EECON2
EEPROM Control Register 2 (not a physical register)
116*
EEADRL
EEADRL<7:0>
114
EEADRH
EEADRH<6:0
114
EEDATL
EEDATL<7:0>
114
EEDATH
EEDATH<5:0>
114
INTCON GIE
PEIE TMR0IE INTE
IOCIE TMR0IF INTF
IOCIF
89
PIE2
OSFIE C2IE(1)
C1IE
EEIE BCL1IE
91
PIR2
OSFIF C2IF(1)
C1IF
EEIF BCL1IF
93
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by Data EEPROM module.
* Page provides register information.
Note 1: PIC16F/LF1823 only.
DS41413A-page 116
Preliminary
2010 Microchip Technology Inc.

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