PIC12F/LF1822/16F/LF1823
TABLE 3-8: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bank 6
300h(1) INDF0
301h(1) INDF1
302h(1)
303h(1)
304h(1)
305h(1)
306h(1)
307h(1)
308h(1)
309h(1)
30Ah(1)
30Bh(1)
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
—
—
—
TO
PD
Z
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
—
—
—
BSR<4:0>
Working Register
—
Write Buffer for the upper 7 bits of the Program Counter
GIE
PEIE
TMR0IE
INTE
IOCIE
TMR0IF
DC
INTF
30Ch —
Unimplemented
30Dh —
Unimplemented
30Eh —
Unimplemented
30Fh —
Unimplemented
310h —
Unimplemented
311h —
Unimplemented
312h —
Unimplemented
313h —
Unimplemented
314h —
Unimplemented
315h —
Unimplemented
316h —
Unimplemented
317h —
Unimplemented
318h —
Unimplemented
319h —
Unimplemented
31Ah —
Unimplemented
31Bh —
Unimplemented
31Ch —
Unimplemented
31Dh —
Unimplemented
31Eh —
Unimplemented
31Fh —
Unimplemented
Legend:
Note 1:
2:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
These registers can be addressed from any bank.
PIC16F/LF1823 only.
Bit 0
Value on:
POR, BOR
Value on all
other
resets
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
C
IOCIF
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 000x 0000 000u
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2010 Microchip Technology Inc.
Preliminary
DS41413A-page 37