PIC16F1828T-I/SL 查看數據表（PDF） - Microchip Technology

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PIC16F1828T-I/SL

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC16(L)F1824/1828

REGISTER 20-1: OPTION_REG: OPTION REGISTER

R/W-1/1

WPUEN

bit 7

R/W-1/1

INTEDG

R/W-1/1

TMR0CS

R/W-1/1

TMR0SE

R/W-1/1

PSA

R/W-1/1

R/W-1/1

PS<2:0>

R/W-1/1

bit 0

Legend:

R = Readable bit

u = Bit is unchanged

‘1’ = Bit is set

W = Writable bit

x = Bit is unknown

‘0’ = Bit is cleared

U = Unimplemented bit, read as ‘0’

-n/n = Value at POR and BOR/Value at all other Resets

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2-0

WPUEN: Weak Pull-up Enable bit

1 = All weak pull-ups are disabled (except MCLR, if it is enabled)

0 = Weak pull-ups are enabled by individual WPUx latch values

INTEDG: Interrupt Edge Select bit

1 = Interrupt on rising edge of RB0/INT pin

0 = Interrupt on falling edge of RB0/INT pin

TMR0CS: Timer0 Clock Source Select bit

1 = Transition on RA4/T0CKI pin

0 = Internal instruction cycle clock (FOSC/4)

TMR0SE: Timer0 Source Edge Select bit

1 = Increment on high-to-low transition on RA4/T0CKI pin

0 = Increment on low-to-high transition on RA4/T0CKI pin

PSA: Prescaler Assignment bit

1 = Prescaler is not assigned to the Timer0 module

0 = Prescaler is assigned to the Timer0 module

PS<2:0>: Prescaler Rate Select bits

Bit Value Timer0 Rate

000

1:2

001

1:4

010

1:8

011

1 : 16

100

1 : 32

101

1 : 64

110

1 : 128

111

1 : 256

TABLE 20-1: SUMMARY OF REGISTERS ASSOCIATED WITH TIMER0

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Register

on Page

CPSCON0

CPSON CPSRM

—

— CPSRNG1 CPSRNG0 CPSOUT T0XCS

331

FVRCON

FVREN FVRRDY TSEN TSRNG CDAFVR1 CDAFVR0 ADFVR1 ADFVR0 146

INLVLA

INTCON

—

— INLVLA5 INLVLA4 INLVLA3 INLVLA2 INLVLA1 INLVLA0 128

GIE

PEIE TMR0IE INTE

IOCIE TMR0IF INTF

IOCIF

93

OPTION_REG WPUEN INTEDG TMR0CS TMR0SE

TMR0

Timer0 Module Register

PSA

PS<2:0>

187

185*

TRISA

—

—

TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0

126

Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by the Timer0 module.

* Page provides register information.

 2010 Microchip Technology Inc.

Preliminary

DS41419B-page 187

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