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PIC16F687T-I/P 查看數據表(PDF) - Microchip Technology

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PIC16F687T-I/P Datasheet PDF : 306 Pages
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PIC16F631/677/685/687/689/690
FIGURE 12-2:
EUSART RECEIVE BLOCK DIAGRAM
SPEN
CREN
OERR
RCIDL
RX/DT pin
Pin Buffer
and Control
Data
Recovery
Baud Rate Generator
BRG16
+1
SPBRGH SPBRG
FOSC
÷n
Multiplier x4 x16 x64 n
SYNC 1 X 0 0 0
BRGH X 1 1 0 0
BRG16 X 1 0 1 0
The operation of the EUSART module is controlled
through three registers:
• Transmit Status and Control (TXSTA)
• Receive Status and Control (RCSTA)
• Baud Rate Control (BAUDCTL)
These registers are detailed in Register 12-1,
Register 12-2 and Register 12-3, respectively.
MSb
Stop (8)
RSR Register
7 ••• 1
LSb
0 START
RX9
FERR
RX9D
RCREG Register
FIFO
8
Data Bus
RCIF
RCIE
Interrupt
DS41262E-page 152
© 2008 Microchip Technology Inc.

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