PIC16F72-04I/ML 查看數據表（PDF） - Microchip Technology

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PIC16F72-04I/ML

28-Pin, 8-Bit CMOS FLASH Microcontoller with A/D Converter

Microchip Technology 

FIGURE 14-5:

OSC1

CLKO AND I/O TIMING

Q4

Q1

10

CLKO

I/O Pin

(Input)

13

14

17

I/O Pin

(Output)

Old Value

20, 21

Note: Refer to Figure 14-3 for load conditions.

Q2

19 18

15

PIC16F72

Q3

11

12

16

New Value

TABLE 14-2: CLKO AND I/O TIMING REQUIREMENTS

Param

No.

Symbol

Characteristic

Min

Typ†

Max

Units Conditions

10* TosH2ckL OSC1↑ to CLKO↓

—

75

200

ns (Note 1)

11* TosH2ckH OSC1↑ to CLKO↑

—

75

200

ns (Note 1)

12* TckR

CLKO rise time

—

35

100

ns (Note 1)

13* TckF

CLKO fall time

—

35

100

ns (Note 1)

14* TckL2ioV CLKO↓ to Port out valid

—

— 0.5 TCY + 20 ns (Note 1)

15* TioV2ckH Port in valid before CLKO↑

TOSC + 200 —

—

ns (Note 1)

16* TckH2ioI Port in hold after CLKO↑

0

—

—

ns (Note 1)

17* TosH2ioV OSC1↑ (Q1 cycle) to Port out valid

—

100

255

ns

18* TosH2ioI OSC1↑ (Q2 cycle) to

Standard (F)

Port input invalid (I/O in Extended (LF)

hold time)

100

—

—

ns

200

—

—

ns

19* TioV2osH Port input valid to OSC1↑ (I/O in setup time)

0

—

—

ns

20* TioR

Port output rise time

Standard (F)

—

10

40

ns

Extended (LF)

—

—

145

ns

21* TioF

Port output fall time

Standard (F)

—

10

40

ns

Extended (LF)

—

—

145

ns

22††* TINP

INT pin high or low time

TCY

—

—

ns

23††* TRBP

RB7:RB4 change INT high or low time

TCY

—

—

ns

* These parameters are characterized but not tested.

† Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are

not tested.

†† These parameters are asynchronous events, not related to any internal clock edges.

Note 1: Measurements are taken in RC mode, where CLKO output is 4 x TOSC.

© 2007 Microchip Technology Inc.

DS39597C-page 95

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