PIC16C711-04SS 查看數據表（PDF） - Microchip Technology

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PIC16C711-04SS

8-Bit CMOS Microcontrollers with A/D Converter

Microchip Technology 

PIC16C71X

4.2.2.6 PCON REGISTER

Applicable Devices 710 71 711 715

The Power Control (PCON) register contains a flag bit

to allow differentiation between a Power-on Reset

(POR) to an external MCLR Reset or WDT Reset.

Those devices with brown-out detection circuitry con-

tain an additional bit to differentiate a Brown-out Reset

(BOR) condition from a Power-on Reset condition. For

the PIC16C715 the PCON register also contains status

bits MPEEN and PER. MPEEN reflects the value of the

MPEEN bit in the configuration word. PER indicates a

parity error reset has occurred.

Note:

BOR is unknown on Power-on Reset. It

must then be set by the user and checked

on subsequent resets to see if BOR is

clear, indicating a brown-out has occurred.

The BOR status bit is a don't care and is

not necessarily predictable if the brown-out

circuit is disabled (by clearing the BODEN

bit in the Configuration word).

FIGURE 4-12: PCON REGISTER (ADDRESS 8Eh), PIC16C710/711

U-0

U-0

U-0

U-0

U-0

—

—

—

—

—

bit7

bit 7-2: Unimplemented: Read as '0'

U-0

R/W-0 R/W-q

—

POR

BOR R = Readable bit

bit0 W = Writable bit

U = Unimplemented bit,

read as ‘0’

- n = Value at POR reset

bit 1:

POR: Power-on Reset Status bit

1 = No Power-on Reset occurred

0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)

bit 0:

BOR: Brown-out Reset Status bit

1 = No Brown-out Reset occurred

0 = A Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs)

FIGURE 4-13: PCON REGISTER (ADDRESS 8Eh), PIC16C715

R-U

U-0

U-0

U-0

U-0

R/W-1 R/W-0

MPEEN

—

—

—

—

PER

POR

bit7

bit 7: MPEEN: Memory Parity Error Circuitry Status bit

Reflects the value of configuration word bit, MPEEN

R/W-q

BOR(1)

bit0

R = Readable bit

W = Writable bit

U = Unimplemented bit,

read as ‘0’

- n = Value at POR reset

bit 6-3: Unimplemented: Read as '0'

bit 2:

PER: Memory Parity Error Reset Status bit

1 = No Error occurred

0 = Program Memory Fetch Parity Error occurred (must be set in software after a Parity Error Reset)

bit 1:

POR: Power-on Reset Status bit

1 = No Power-on Reset occurred

0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)

bit 0:

BOR: Brown-out Reset Status bit

1 = No Brown-out Reset occurred

0 = A Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs)

DS30272A-page 22

© 1997 Microchip Technology Inc.

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