PIC16F1512T-E/SO 查看數據表（PDF） - Microchip Technology
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PIC16F1512T-E/SO Datasheet PDF : 360 Pages
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PIC16(L)F1512/3
FIGURE 22-4:
Write to TXREG
BRG Output
(Shift Clock)
TX/CK
pin
TXIF bit
(Transmit Buffer
Reg. Empty Flag)
TRMT bit
(Transmit Shift
Reg. Empty Flag)
ASYNCHRONOUS TRANSMISSION (BACK-TO-BACK)
Word 1
Word 2
1 TCY
Start bit
Word 1
Transmit Shift Reg.
bit 0
1 TCY
bit 1
Word 1
bit 7/8 Stop bit
Start bit
bit 0
Word 2
Word 2
Transmit Shift Reg.
Note:
This timing diagram shows two consecutive transmissions.
TABLE 22-1: SUMMARY OF REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
BAUDCON ABDOVF RCIDL
—
SCKP BRG16
—
WUE ABDEN
INTCON
GIE
PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF
PIE1
TMR1GIE ADIE
RCIE
TXIE SSPIE CCP1IE TMR2IE TMR1IE
PIR1
TMR1GIF ADIF
RCIF
TXIF SSPIF CCP1IF TMR2IF TMR1IF
RCSTA
SPEN
RX9
SREN CREN ADDEN FERR OERR RX9D
SPBRGL
BRG<7:0>
SPBRGH
BRG<15:8>
TRISC
TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0
TXREG
EUSART Transmit Data Register
TXSTA
CSRC
TX9
TXEN SYNC SENDB BRGH TRMT TX9D
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for asynchronous transmission.
* Page provides register information.
249
69
70
72
248
250*
250*
110
239*
247
2012-2014 Microchip Technology Inc.
DS40001624C-page 241
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