PIC16F1513-I/SP 查看數據表（PDF） - Microchip Technology

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PIC16F1513-I/SP

28-Pin Flash Microcontrollers with XLP Technology

Microchip Technology 

PIC16(L)F1512/3

FIGURE 7-3:

INT PIN INTERRUPT TIMING

OSC1

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4

CLKOUT (3)

(4)

INT pin

INTF

(1)

(1)

(5)

Interrupt Latency (2)

GIE

INSTRUCTION FLOW

PC

PC

Instruction

Fetched

Inst (PC)

PC + 1

Inst (PC + 1)

PC + 1

—

0004h

Inst (0004h)

0005h

Inst (0005h)

Instruction

Executed

Inst (PC – 1)

Inst (PC)

Dummy Cycle

Dummy Cycle

Inst (0004h)

Note 1: INTF flag is sampled here (every Q1).

2: Asynchronous interrupt latency = 3-5 TCY. Synchronous latency = 3-4 TCY, where TCY = instruction cycle time.

Latency is the same whether Inst (PC) is a single cycle or a 2-cycle instruction.

3: CLKOUT not available in all oscillator modes.

4: For minimum width of INT pulse, refer to AC specifications in Section 25.0 “Electrical Specifications”.

5: INTF is enabled to be set any time during the Q4-Q1 cycles.

 2012-2014 Microchip Technology Inc.

DS40001624C-page 67

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