PIC17C43T-08/P 查看數據表（PDF） - Microchip Technology

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PIC17C43T-08/P

High-Performance 8-Bit CMOS EPROM/ROM Microcontroller

Microchip Technology 

PIC17C4X

FIGURE 19-3: CLKOUT AND I/O TIMING

Applicable Devices 42 R42 42A 43 R43 44

Q4

Q1

Q2

Q3

OSC1

OSC2 †

I/O Pin

(input)

I/O Pin

(output)

old value

† In EC and RC modes only.

10

13

14 19

22

23

18

17

15

20, 21

11

12

16

new value

TABLE 19-3: CLKOUT AND I/O TIMING REQUIREMENTS

Parameter

No. Sym

Characteristic

Min

Typ†

Max

Units Conditions

10

TosH2ckL OSC1↓ to CLKOUT↓

—

15 ‡

30 ‡

ns

Note 1

11

TosH2ckH OSC1↓ to CLKOUT↑

—

15 ‡

30 ‡

ns

Note 1

12

TckR

CLKOUT rise time

—

5‡

15 ‡

ns

Note 1

13

TckF

CLKOUT fall time

—

5‡

15 ‡

ns

Note 1

14

TckH2ioV CLKOUT ↑ to Port PIC17CR42/42A/43/

out valid

R43/44

—

— 0.5TCY + 20 ‡ ns

Note 1

PIC17LCR42/42A/43/

—

R43/44

— 0.5TCY + 50 ‡ ns

Note 1

15

TioV2ckH Port in valid before PIC17CR42/42A/43/ 0.25TCY + 25 ‡ —

—

ns

Note 1

CLKOUT↑

R43/44

PIC17LCR42/42A/43/ 0.25TCY + 50 ‡ —

—

ns

Note 1

R43/44

16

TckH2ioI Port in hold after CLKOUT↑

0‡

—

—

ns

Note 1

17

TosH2ioV OSC1↓ (Q1 cycle) to Port out valid

—

—

100 ‡

ns

18

TosH2ioI OSC1↓ (Q2 cycle) to Port input invalid

(I/O in hold time)

0‡

—

—

ns

19

TioV2osH Port input valid to OSC1↓

(I/O in setup time)

30 ‡

—

—

ns

20

TioR

Port output rise time

—

10 ‡

35 ‡

ns

21

TioF

Port output fall time

—

10 ‡

35 ‡

ns

22

TinHL

INT pin high or low time

25 *

—

—

ns

23

TrbHL

RB7:RB0 change INT high or low time

25 *

—

—

ns

*

†

‡

Note 1:

These parameters are characterized but not tested.

Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not

tested.

These parameters are for design guidance only and are not tested, nor characterized.

Measurements are taken in EC Mode where CLKOUT output is 4 x TOSC.

© 1996 Microchip Technology Inc.

DS30412C-page 185

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