PIC18CXX2
18.2.2 WDT POSTSCALER
The WDT has a postscaler that can extend the WDT
Reset period. The postscaler is selected at the time of
device programming, by the value written to the
CONFIG2H configuration register.
FIGURE 18-1:
WATCHDOG TIMER BLOCK DIAGRAM
WDT Timer
WDTEN
Configuration bit
SWDTEN bit
Postscaler
8
8 - to - 1 MUX
WDTPS2:WDTPS0
Note: WDPS2:WDPS0 are bits in register CONFIG2H.
WDT
Time-out
TABLE 18-2: SUMMARY OF WATCHDOG TIMER REGISTERS
Name
Bit 7
Bit 6
Bit 5
Bit 4
CONFIG2H
—
—
—
—
RCON
IPEN
LWRT
—
RI
WDTCON
—
—
—
—
Legend: Shaded cells are not used by the Watchdog Timer.
Bit 3
WDTPS2
TO
—
Bit 2
WDTPS2
PD
—
Bit 1
WDTPS0
POR
—
Bit 0
WDTEN
BOR
SWDTEN
DS39026D-page 184
1999-2013 Microchip Technology Inc.