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PIC18LF1320-I/PSQTP 查看數據表(PDF) - Microchip Technology

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PIC18LF1320-I/PSQTP Datasheet PDF : 308 Pages
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PIC18F1220/1320
FIGURE 10-12:
BLOCK DIAGRAM OF RB5/PGM/KBI1 PIN
RBPU(2)
Data Bus
WR LATB
or PORTB
WR TRISB
RD TRISB
Data Latch
DQ
CK
TRIS Latch
DQ
CK
VDD
P
Weak
Pull-up
I/O pin(1)
TTL
Input
Buffer
ST
Buffer
RD LATB
RD PORTB
Set RBIF
Latch
QD
EN
Q1
From other
RB7:RB5 and
RB4 pins
RB7:RB5 in Serial Programming Mode
QD
EN
RD PORTB
Q3
Note 1: I/O pins have diode protection to VDD and VSS.
2: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit
(INTCON2<7>).
© 2007 Microchip Technology Inc.
DS39605F-page 95

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