PIC18F2685T-I/SP 查看數據表（PDF） - Microchip Technology

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PIC18F2685T-I/SP

28/40/44-Pin Enhanced Flash Microcontrollers with ECAN™ Technology, 10-Bit A/D and nanoWatt Technology

Microchip Technology 

PIC18F2682/2685/4682/4685

MOVSS

Move Indexed to Indexed

Syntax:

Operands:

Operation:

Status Affected:

MOVSS [zs], [zd]

0 ≤ zs ≤ 127

0 ≤ zd ≤ 127

((FSR2) + zs) → ((FSR2) + zd)

None

Encoding:

1st word (source)

2nd word (dest.)

1110

1111

1011

xxxx

1zzz zzzzs

xzzz zzzzd

Description

The contents of the source register are

moved to the destination register. The

addresses of the source and destination

registers are determined by adding the

7-bit literal offsets ‘zs’ or ‘zd’,

respectively, to the value of FSR2. Both

registers can be located anywhere in

the 4096-byte data memory space

(000h to FFFh).

The MOVSS instruction cannot use the

PCL, TOSU, TOSH or TOSL as the

destination register.

If the resultant source address points to

an indirect addressing register, the

value returned will be 00h. If the

resultant destination address points to

an indirect addressing register, the

instruction will execute as a NOP.

Words:

2

Cycles:

2

Q Cycle Activity:

Q1

Q2

Q3

Q4

Decode Determine Determine

Read

source addr source addr source reg

Decode

Determine Determine

Write

dest addr dest addr to dest reg

Example:

MOVSS [05h], [06h]

Before Instruction

FSR2

Contents

of 85h

Contents

of 86h

= 80h

= 33h

= 11h

After Instruction

FSR2

Contents

of 85h

Contents

of 86h

= 80h

= 33h

= 33h

PUSHL

Store Literal at FSR2, Decrement FSR2

Syntax:

PUSHL k

Operands: 0 ≤ k ≤ 255

Operation:

k → (FSR2),

FSR2 – 1 → FSR2

Status Affected: None

Encoding:

1111 1010 kkkk kkkk

Description:

The 8-bit literal ‘k’ is written to the data

memory address specified by FSR2. FSR2 is

decremented by 1 after the operation.

This instruction allows users to push values

onto a software stack.

Words:

1

Cycles:

1

Q Cycle Activity:

Q1

Decode

Q2

Read ‘k’

Q3

Process

data

Q4

Write to

destination

Example:

PUSHL 08h

Before Instruction

FSR2H:FSR2L

=

Memory (01ECh)

=

01ECh

00h

After Instruction

FSR2H:FSR2L

Memory (01ECh)

= 01EBh

= 08h

DS39761B-page 408

Preliminary

© 2007 Microchip Technology Inc.

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