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PIC18F2455T-I/ML 查看數據表(PDF) - Microchip Technology

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PIC18F2455T-I/ML Datasheet PDF : 438 Pages
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PIC18F2455/2550/4455/4550
24.6 Operation During Sleep
When enabled, the HLVD circuitry continues to operate
during Sleep. If the device voltage crosses the trip
point, the HLVDIF bit will be set and the device will
wake-up from Sleep. Device execution will continue
from the interrupt vector address if interrupts have
been globally enabled.
24.7 Effects of a Reset
A device Reset forces all registers to their Reset state.
This forces the HLVD module to be turned off.
TABLE 24-1: REGISTERS ASSOCIATED WITH HIGH/LOW-VOLTAGE DETECT MODULE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
HLVDCON VDIRMAG
IRVST HLVDEN HLVDL3 HLVDL2 HLVDL1 HLVDL0 54
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF
53
PIR2
OSCFIF
CMIF
USBIF
EEIF
BCLIF HLVDIF TMR3IF CCP2IF
56
PIE2
OSCFIE CMIE USBIE EEIE BCLIE HLVDIE TMR3IE CCP2IE 56
IPR2
OSCFIP CMIP USBIP EEIP BCLIP HLVDIP TMR3IP CCP2IP 56
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the HLVD module.
© 2009 Microchip Technology Inc.
DS39632E-page 289

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