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PIC18F4580ISOSQTP 查看數據表(PDF) - Microchip Technology

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PIC18F4580ISOSQTP Datasheet PDF : 490 Pages
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PIC18F2480/2580/4480/4580
23.6 Operation During Sleep
When enabled, the HLVD circuitry continues to operate
during Sleep. If the device voltage crosses the trip
point, the HLVDIF bit will be set and the device will
wake-up from Sleep. Device execution will continue
from the interrupt vector address if interrupts have
been globally enabled.
23.7 Effects of a Reset
A device Reset forces all registers to their Reset state.
This forces the HLVD module to be turned off.
TABLE 23-1: REGISTERS ASSOCIATED WITH HIGH/LOW-VOLTAGE DETECT MODULE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on Page:
HLVDCON VDIRMAG
IRVST HLVDEN HLVDL3 HLVDL2 HLVDL1 HLVDL0
56
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF
55
PIR2
OSCFIF CMIF
EEIF BCLIF HLVDIF TMR3IF ECCP1IF 58
PIE2
OSCFIE CMIE
EEIE BCLIE HLVDIE TMR3IE ECCP1IE 58
IPR2
OSCFIP CMIP
EEIP BCLIP HLVDIP TMR3IP ECCP1IP 57
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the HLVD module.
© 2009 Microchip Technology Inc.
DS39637D-page 277

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