PIC18LF45J10-I/SP 查看數據表（PDF） - Microchip Technology

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PIC18LF45J10-I/SP

28/40/44-Pin High-Performance RISC Microcontrollers with nanoWatt Technology

Microchip Technology 

PIC18F45J10 FAMILY

8.5 RCON Register

The RCON register contains bits used to determine the

cause of the last Reset or wake-up from Idle or Sleep

modes. RCON also contains the bit that enables

interrupt priorities (IPEN).

REGISTER 8-13: RCON: RESET CONTROL REGISTER

R/W-0

U-0

U-0

R/W-1

R-1

IPEN

—

—

RI

TO

bit 7

R-1

R/W-0 R/W-0

PD

POR

BOR

bit 0

bit 7

bit 6-5

bit 4

bit 3

bit 2

bit 1

bit 0

IPEN: Interrupt Priority Enable bit

1 = Enable priority levels on interrupts

0 = Disable priority levels on interrupts (PIC16CXXX Compatibility mode)

Unimplemented: Read as ‘0’

RI: RESET Instruction Flag bit

For details of bit operation, see Register 4-1.

TO: Watchdog Timer Time-out Flag bit

For details of bit operation, see Register 4-1.

PD: Power-Down Detection Flag bit

For details of bit operation, see Register 4-1.

POR: Power-on Reset Status bit

For details of bit operation, see Register 4-1.

BOR: Brown-out Reset Status bit

For details of bit operation, see Register 4-1.

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared x = Bit is unknown

DS39682C-page 90

Preliminary

© 2007 Microchip Technology Inc.

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