PIC18F44J50-I/SPSQTP 查看數據表（PDF） - Microchip Technology

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PIC18F44J50-I/SPSQTP

28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC18F46J50 FAMILY

REGISTER 7-1: EECON1: EEPROM CONTROL REGISTER 1 (ACCESS FA6h)

U-0

—

bit 7

U-0

R/W-0

R/W-0

R/W-x

R/W-0

R/S-0

—

WPROG

FREE

WRERR

WREN

WR

U-0

—

bit 0

Legend:

R = Readable bit

-n = Value at POR

S = Settable bit (cannot be cleared in software)

W = Writable bit

U = Unimplemented bit, read as ‘0’

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

Unimplemented: Read as ‘0’

WPROG: One Word-Wide Program bit

1 = Program 2 bytes on the next WR command

0 = Program 64 bytes on the next WR command

FREE: Flash Erase Enable bit

1 = Perform an erase operation on the next WR command (cleared by hardware after completion of erase)

0 = Perform write only

WRERR: Flash Program Error Flag bit

1 = A write operation is prematurely terminated (any Reset during self-timed programming in normal

operation or an improper write attempt)

0 = The write operation is complete

WREN: Flash Program Write Enable bit

1 = Allows write cycles to Flash program memory

0 = Inhibits write cycles to Flash program memory

WR: Write Control bit

1 = Initiates a program memory erase cycle or write cycle

(The operation is self-timed and the bit is cleared by hardware once the write is complete. The WR

bit can only be set (not cleared) in software.)

0 = Write cycle is complete

Unimplemented: Read as ‘0’

 2011 Microchip Technology Inc.

DS39931D-page 105

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