PIC18F26J50-I/SPQTP 查看數據表（PDF） - Microchip Technology

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PIC18F26J50-I/SPQTP

28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC18F46J50 FAMILY

REGISTER 10-1: ODCON1: PERIPHERAL OPEN-DRAIN CONTROL REGISTER 1 (BANKED F42h)

U-0

U-0

U-0

U-0

U-0

U-0

R/W-0

R/W-0

—

—

—

—

—

—

ECCP2OD ECCP1OD

bit 7

bit 0

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-2

bit 1

bit 0

Unimplemented: Read as ‘0’

ECCP2OD: ECCP2 Open-Drain Output Enable bit

1 = Open-drain capability is enabled

0 = Open-drain capability is disabled

ECCP1OD: ECCP1 Open-Drain Output Enable bit

1 = Open-drain capability is enabled

0 = Open-drain capability is disabled

REGISTER 10-2: ODCON2: PERIPHERAL OPEN-DRAIN CONTROL REGISTER 2 (BANKED F41h)

U-0

U-0

U-0

U-0

U-0

U-0

R/W-0

R/W-0

—

—

—

—

—

—

U2OD

U1OD

bit 7

bit 0

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-2

bit 1

bit 0

Unimplemented: Read as ‘0’

U2OD: USART2 Open-Drain Output Enable bit

1 = Open-drain capability is enabled

0 = Open-drain capability is disabled

U1OD: USART1 Open-Drain Output Enable bit

1 = Open-drain capability is enabled

0 = Open-drain capability is disabled

DS39931D-page 134

 2011 Microchip Technology Inc.

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