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PIC18LF45J50-I/SO 查看數據表(PDF) - Microchip Technology

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PIC18LF45J50-I/SO Datasheet PDF : 562 Pages
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PIC18F46J50 FAMILY
TABLE 1-4: PIC18F4XJ50 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin Buffer
44- 44- Type Type
QFN TQFP
Description
PORTB is a bidirectional I/O port. PORTB can be
software programmed for internal weak pull-ups on
all inputs.
RB0/AN12/INT0/RP3
RB0
AN12
INT0
RP3
9
8
I/O DIG
Digital I/O.
I Analog Analog Input 12.
I
ST
External Interrupt 0.
I/O DIG
Remappable Peripheral Pin 3 input/output.
RB1/AN10/PMBE/RTCC/RP4
RB1
AN10
PMBE
RTCC
RP4
10
9
I/O DIG
Digital I/O.
I Analog Analog Input 10.
O DIG
Parallel Master Port byte enable.
O DIG
Real-Time Clock Calendar (RTCC) output.
I/O DIG
Remappable Peripheral Pin 4 Input/output.
RB2/AN8/CTED1/PMA3/VMO/
REFO/RP5
RB2
AN8
CTED1
PMA3
VMO
REFO
RP5
11 10
I/O DIG
I Analog
I
ST
O DIG
O DIG
O DIG
I/O DIG
Digital I/O.
Analog Input 8.
CTMU Edge 1 input.
Parallel Master Port address.
External USB transceiver D- data output.
Reference output clock.
Remappable Peripheral Pin 5 input/output.
RB3/AN9/CTED2/PMA2/VPO/
RP6
RB3
AN9
CTED2
PMA2
VPO
RP6
12 11
I/O DIG
I Analog
I
ST
O DIG
O DIG
I/O DIG
Digital I/O.
Analog Input 9.
CTMU Edge 2 input.
Parallel Master Port address.
External USB transceiver D+ data output.
Remappable Peripheral Pin 6 input/output.
Legend:
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
I = Input
P = Power
DIG = Digital output
CMOS
Analog
O
OD
I2C™
= CMOS compatible input or output
= Analog input
= Output
= Open-Drain (no P diode to VDD)
= Open-Drain, I2C-specific
Note 1: RA7 and RA6 will be disabled if OSC1 and OSC2 are used for the clock function.
DS39931D-page 24
2011 Microchip Technology Inc.

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