PIC18F45J50-I/SOSQTP 查看數據表（PDF） - Microchip Technology

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PIC18F45J50-I/SOSQTP

28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC18F46J50 FAMILY

18.5.1 HALF-BRIDGE MODE

In Half-Bridge mode, two pins are used as outputs to

drive push-pull loads. The PWM output signal is output

on the PxA pin, while the complementary PWM output

signal is output on the PxB pin (see Figure 18-8). This

mode can be used for half-bridge applications, as

shown in Figure 18-9, or for full-bridge applications,

where four power switches are being modulated with

two PWM signals.

In Half-Bridge mode, the programmable dead-band delay

can be used to prevent shoot-through current in

half-bridge power devices. The value of the PxDC<6:0>

bits of the ECCPxDEL register sets the number of

instruction cycles before the output is driven active. If the

value is greater than the duty cycle, the corresponding

output remains inactive during the entire cycle. See

Section 18.5.6 “Programmable Dead-Band Delay

Mode” for more details of the dead-band delay

operations.

Since the PxA and PxB outputs are multiplexed with the

port data latches, the associated TRIS bits must be

cleared to configure PxA and PxB as outputs.

FIGURE 18-8:

EXAMPLE OF

HALF-BRIDGE PWM

OUTPUT

Period

Period

PxA(2)

Pulse Width

td

td

PxB(2)

(1)

(1)

(1)

td = Dead-Band Delay

Note 1: At this time, the TMR2 register is equal to the

PR2 register.

2: Output signals are shown as active-high.

FIGURE 18-9:

EXAMPLE OF HALF-BRIDGE APPLICATIONS

Standard Half-Bridge Circuit (“Push-Pull”)

FET

Driver

PxA

FET

Driver

PxB

+

-

Load

+

-

Half-Bridge Output Driving a Full-Bridge Circuit

FET

Driver

PxA

FET

Driver

PxB

V+

Load

FET

Driver

FET

Driver

DS39931D-page 256

 2011 Microchip Technology Inc.

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