PIC18F45J50-I/SOSQTP 查看數據表（PDF） - Microchip Technology

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PIC18F45J50-I/SOSQTP

28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC18F46J50 FAMILY

ADDWFC

Syntax:

Operands:

Operation:

Status Affected:

Encoding:

Description:

Words:

Cycles:

Q Cycle Activity:

Q1

Decode

ADD W and Carry bit to f

ADDWFC f {,d {,a}}

0  f  255

d [0,1]

a [0,1]

(W) + (f) + (C)  dest

N,OV, C, DC, Z

0010 00da ffff ffff

Add W, the Carry flag and data memory

location, ‘f’. If ‘d’ is ‘0’, the result is

placed in W. If ‘d’ is ‘1’, the result is

placed in data memory location ‘f’.

If ‘a’ is ‘0’, the Access Bank is selected.

If ‘a’ is ‘1’, the BSR is used to select the

GPR bank (default).

If ‘a’ is ‘0’ and the extended instruction

set is enabled, this instruction operates

in Indexed Literal Offset Addressing

mode whenever f 95 (5Fh). See

Section 28.2.3 “Byte-Oriented and

Bit-Oriented Instructions in Indexed

Literal Offset Mode” for details.

1

1

Q2

Read

register ‘f’

Q3

Process

Data

Q4

Write to

destination

Example:

ADDWFC

Before Instruction

Carry bit = 1

REG = 02h

W

= 4Dh

After Instruction

Carry bit = 0

REG = 02h

W

= 50h

REG, 0, 1

ANDLW

Syntax:

Operands:

Operation:

Status Affected:

Encoding:

Description:

Words:

Cycles:

Q Cycle Activity:

Q1

Decode

AND Literal with W

ANDLW k

0  k  255

(W) .AND. k  W

N, Z

0000 1011 kkkk kkkk

The contents of W are ANDed with the

8-bit literal ‘k’. The result is placed in

W.

1

1

Q2

Read literal

‘k’

Q3

Process

Data

Q4

Write to

W

Example:

ANDLW

Before Instruction

W

= A3h

After Instruction

W

= 03h

0x5F

DS39931D-page 442

 2011 Microchip Technology Inc.

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