PIC18LF6627-I/PT 查看數據表（PDF） - Microchip Technology

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PIC18LF6627-I/PT

64/80-Pin, 1-Mbit, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

Microchip Technology 

PIC18F8722 FAMILY

TABLE 1-3: PIC18F6527/6622/6627/6722 PINOUT I/O DESCRIPTIONS

Pin Name

Pin Number Pin Buffer

TQFP

Type Type

Description

RG5/MCLR/VPP

RG5

MCLR

VPP

7

Master Clear (input) or programming voltage (input).

I

ST

Digital input.

I

ST

Master Clear (Reset) input. This pin is an active-low

Reset to the device.

P

Programming voltage input.

OSC1/CLKI/RA7

OSC1

CLKI

RA7

39

Oscillator crystal or external clock input.

I

ST

Oscillator crystal input or external clock source input.

ST buffer when configured in RC mode, CMOS

otherwise.

I CMOS External clock source input. Always associated

with pin function OSC1. (See related OSC1/CLKI,

OSC2/CLKO pins.)

I/O TTL

General purpose I/O pin.

OSC2/CLKO/RA6

OSC2

CLKO

RA6

40

Oscillator crystal or clock output.

O

—

Oscillator crystal output. Connects to crystal or

resonator in Crystal Oscillator mode.

O

—

In RC mode, OSC2 pin outputs CLKO, which has

1/4 the frequency of OSC1 and denotes the

instruction cycle rate.

I/O TTL

General purpose I/O pin.

Legend:

Note 1:

2:

TTL = TTL compatible input

CMOS = CMOS compatible input or output

ST = Schmitt Trigger input with CMOS levels

Analog = Analog input

I = Input

P = Power

O

= Output

I2C™ = I2C/SMBus input buffer

Default assignment for ECCP2 when configuration bit CCP2MX is set.

Alternate assignment for ECCP2 when configuration bit CCP2MX is cleared.

 2004 Microchip Technology Inc.

Preliminary

DS39646B-page 13

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