PIC18LF2610T-I/SO 查看數據表（PDF） - Microchip Technology

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PIC18LF2610T-I/SO

28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

Microchip Technology 

17.0 ENHANCED UNIVERSAL

SYNCHRONOUS RECEIVER

TRANSMITTER (EUSART)

The Enhanced Universal Synchronous Asynchronous

Receiver Transmitter (EUSART) module is one of the

two serial I/O modules. (Generically, the USART is also

known as a Serial Communications Interface or SCI.)

The EUSART can be configured as a full-duplex

asynchronous system that can communicate with

peripheral devices, such as CRT terminals and

personal computers. It can also be configured as a half-

duplex synchronous system that can communicate

with peripheral devices, such as A/D or D/A integrated

circuits, serial EEPROMs, etc.

The Enhanced USART module implements additional

features, including automatic baud rate detection and

calibration, automatic wake-up on Sync Break recep-

tion and 12-bit Break character transmit. These make it

ideally suited for use in Local Interconnect Network bus

(LIN bus) systems.

The EUSART can be configured in the following

modes:

• Asynchronous (full duplex) with:

- Auto-wake-up on character reception

- Auto-baud calibration

- 12-bit Break character transmission

• Synchronous – Master (half duplex) with

selectable clock polarity

• Synchronous – Slave (half duplex) with selectable

clock polarity

PIC18F2X1X/4X1X

The pins of the Enhanced USART are multiplexed with

PORTC. In order to configure RC6/TX/CK and

RC7/RX/DT as a USART:

• bit SPEN (RCSTA<7>) must be set (= 1)

• bit TRISC<7> must be set (= 1)

• bit TRISC<6> must be set (= 1)

Note:

The EUSART control will automatically

reconfigure the pin from input to output as

needed.

The operation of the Enhanced USART module is

controlled through three registers:

• Transmit Status and Control (TXSTA)

• Receive Status and Control (RCSTA)

• Baud Rate Control (BAUDCON)

These are detailed on the following pages in

Register 17-1, Register 17-2 and Register 17-3,

respectively.

© 2007 Microchip Technology Inc.

Preliminary

DS39636C-page 191

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