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PIC18LF4420T-I/SO 查看數據表(PDF) - Microchip Technology

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PIC18LF4420T-I/SO Datasheet PDF : 390 Pages
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PIC18F2420/2520/4420/4520
22.6 Operation During Sleep
When enabled, the HLVD circuitry continues to operate
during Sleep. If the device voltage crosses the trip
point, the HLVDIF bit will be set and the device will
wake-up from Sleep. Device execution will continue
from the interrupt vector address if interrupts have
been globally enabled.
22.7 Effects of a Reset
A device Reset forces all registers to their Reset state.
This forces the HLVD module to be turned off.
TABLE 22-1: REGISTERS ASSOCIATED WITH HIGH/LOW-VOLTAGE DETECT MODULE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on Page
HLVDCON VDIRMAG
IRVST HLVDEN HLVDL3 HLVDL2 HLVDL1 HLVDL0 50
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF
49
PIR2
OSCFIF CMIF
EEIF
BCLIF HLVDIF TMR3IF CCP2IF
52
PIE2
OCSFIE CMIE
EEIE BCLIE HLVDIE TMR3IE CCP2IE 52
IPR2
OSCFIP CMIP
EEIP BCLIP HLVDIP TMR3IP CCP2IP 52
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the HLVD module.
2004 Microchip Technology Inc.
DS39631A-page 247

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