PIC18LF4420T-I/SO 查看數據表（PDF） - Microchip Technology

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PIC18LF4420T-I/SO

28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

Microchip Technology 

PIC18F2420/2520/4420/4520

RCALL

Relative Call

Syntax:

Operands:

Operation:

Status Affected:

Encoding:

Description:

Words:

Cycles:

Q Cycle Activity:

Q1

Decode

No

operation

RCALL n

-1024 ≤ n ≤ 1023

(PC) + 2 → TOS,

(PC) + 2 + 2n → PC

None

1101 1nnn nnnn nnnn

Subroutine call with a jump up to 1K

from the current location. First, return

address (PC + 2) is pushed onto the

stack. Then, add the 2’s complement

number ‘2n’ to the PC. Since the PC will

have incremented to fetch the next

instruction, the new address will be

PC + 2 + 2n. This instruction is a

two-cycle instruction.

1

2

Q2

Read literal

‘n’

PUSH PC to

stack

No

operation

Q3

Process

Data

No

operation

Q4

Write to PC

No

operation

Example:

HERE

RCALL Jump

Before Instruction

PC = Address (HERE)

After Instruction

PC = Address (Jump)

TOS = Address (HERE + 2)

RESET

Syntax:

Operands:

Operation:

Status Affected:

Encoding:

Description:

Words:

Cycles:

Q Cycle Activity:

Q1

Decode

Reset

RESET

None

Reset all registers and flags that are

affected by a MCLR Reset.

All

0000 0000 1111 1111

This instruction provides a way to

execute a MCLR Reset in software.

1

1

Q2

Start

Reset

Q3

No

operation

Q4

No

operation

Example:

RESET

After Instruction

Registers =

Flags* =

Reset Value

Reset Value

 2004 Microchip Technology Inc.

Preliminary

DS39631A-page 297

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