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PIC18LF4420T-I/SO 查看數據表(PDF) - Microchip Technology

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PIC18LF4420T-I/SO Datasheet PDF : 390 Pages
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PIC18F2420/2520/4420/4520
FIGURE 26-7:
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND
POWER-UP TIMER TIMING
VDD
MCLR
Internal
POR
PWRT
Time-out
OSC
Time-out
Internal
Reset
Watchdog
Timer
Reset
33
32
I/O pins
Note: Refer to Figure 26-4 for load conditions.
30
31
34
34
FIGURE 26-8:
BROWN-OUT RESET TIMING
VDD
BVDD
35
VIRVST
Enable Internal
Reference Voltage
Internal Reference
Voltage Stable
36
VBGAP = 1.2V
TABLE 26-10: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER
AND BROWN-OUT RESET REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min Typ Max Units
Conditions
30
TmcL MCLR Pulse Width (low)
2
31
TWDT Watchdog Timer Time-out Period
(no postscaler)
4.00 TBD
32
TOST Oscillation Start-up Timer Period 1024 TOSC — 1024 TOSC
33
TPWRT Power-up Timer Period
65.5 TBD
34
TIOZ I/O High-Impedance from MCLR
Low or Watchdog Timer Reset
2
35
TBOR Brown-out Reset Pulse Width
200
36
TIVRST Time for Internal Reference
Voltage to become Stable
20
50
37
TLVD High/Low-Voltage Detect Pulse Width 200
38
TCSD CPU Start-up Time
5
10
39
TIOBST Time for INTOSC to Stabilize
1
Legend: TBD = To Be Determined
µs
ms
— TOSC = OSC1 period
ms
µs
µs VDD BVDD (see D005)
µs
µs VDD VLVD
µs
ms
2004 Microchip Technology Inc.
Preliminary
DS39631A-page 345

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