PIC18F258-I/SP 查看數據表（PDF） - Microchip Technology

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PIC18F258-I/SP

28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module

Microchip Technology 

PIC18FXX8

FIGURE 10-3:

CS

WR

RD

PORTD

IBF

OBF

PSPIF

PARALLEL SLAVE PORT READ WAVEFORMS

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4

TABLE 10-1: REGISTERS ASSOCIATED WITH PARALLEL SLAVE PORT

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

POR, BOR

Value on

all other

Resets

PORTD

LATD

TRISD

PORTE

LATE

TRISE

INTCON

PIR1

PIE1

IPR1

Legend:

Port Data Latch when written; Port pins when read

xxxx xxxx uuuu uuuu

LATD Data Output bits

xxxx xxxx uuuu uuuu

PORTD Data Direction bits

1111 1111 1111 1111

—

—

—

—

—

RE2 RE1 RE0 ---- -xxx ---- -000

LATE Data Output bits

---- -xxx ---- -uuu

IBF

OBF

IBOV PSPMODE — PORTE Data Direction bits 0000 -111 0000 -111

GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 0000 000x 0000 000u

PSPIF

ADIF

RCIF

TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000

PSPIE

ADIE

RCIE

TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000

PSPIP

ADIP

RCIP

TXIP SSPIP CCP1IP TMR2IP TMR1IP 1111 1111 1111 1111

x = unknown, u = unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used by the Parallel Slave Port.

DS41159E-page 108

© 2006 Microchip Technology Inc.

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