PSD9333V15MIT 查看數據表（PDF） - STMicroelectronics
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PSD9333V15MIT Datasheet PDF : 110 Pages
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PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
AC/DC PARAMETERS
These tables describe the AD and DC parameters
of the PSD:
❏ DC Electrical Specification
❏ AC Timing Specification
■ PLD Timing
– Combinatorial Timing
– Synchronous Clock Mode
– Asynchronous Clock Mode
– Input Macrocell Timing
■ MCU Timing
– READ Timing
– WRITE Timing
– Peripheral Mode Timing
– Power-down and Reset Timing
The following are issues concerning the parame-
ters presented:
– In the DC specification the supply current is
given for different modes of operation. Before
calculating the total power consumption,
determine the percentage of time that the PSD
is in each mode. Also, the supply power is
considerably different if the Turbo Bit is ’0.’
– The AC power component gives the PLD,
Flash memory, and SRAM mA/MHz
specification. Figures 35 and 36 show the PLD
mA/MHz as a function of the number of
Product Terms (PT) used.
– In the PLD timing parameters, add the
required delay when Turbo Bit is ’0.’
Figure 35. PLD ICC /Frequency Consumption (5V range)
110
100
90
80
VCC
= 5V
TURBO
ON (100%)
70
60
50
TURBO ON (25%)
40
30
20
10
TURBO OFF
PT 100%
PT 25%
0
0
5
10
15
20
25
HIGHEST COMPOSITE FREQUENCY AT PLD INPUTS (MHz)
Figure 36. PLD ICC /Frequency Consumption (3V range)
60
VCC = 3V
50
TURBO ON (100%)
40
AI02894
30
20
TURBO ON (25%)
PT 100%
10
TURBO OFF
PT 25%
0
0
5
10
15
20
25
HIGHEST COMPOSITE FREQUENCY AT PLD INPUTS (MHz)
AI03100
72/110
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