SL20T0081 查看數據表（PDF） - System Logic Semiconductor
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SL20T0081 Datasheet PDF : 56 Pages
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SLS System Logic Semiconductor
SL20T0081
Set Column Address
Sets the Column Address of display RAM from the microprocessor into Column Address register. Along with the
Column Address, the Column Address defines the address of the display RAM to write or read display data. When the
microprocessor reads or writes display data to or from display RAM, Column Addresses are automatically increased.
Set Column Address MSB
RS
RW
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
1
A7
A6
A5
A4
Set Column Address LSB
RS
RW
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
1
A3
A2
A1
A0
A7
A6
A5
A4
A3
A2
A1
A0
Column address
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
:
:
:
:
:
:
:
:
:
1
0
0
0
0
0
1
0
130
1
0
0
0
0
0
1
1
131
Read Status
Read the internal status of the SL20T0081.
RS
RW
D7
D6
D5
D4
D3
D2
D1
D0
0
1
BUSY
ADC ON/OFF RESET
0
0
0
0
Flag
BUSY
ADC
ON/OFF
RESET
Description
The device is busy when internal operation or reset.
Any instruction is rejected until BUSY goes Low.
0: chip is active, 1: chip is being busy
Indicates the relationship between RAM column address and segment driver.
0: reverse direction (SEG131 SEGO), 1: normal direction (SEGO SEG131)
Indicates display ON / OFF status.
0: display ON, 1: display OFF
Indicates the initialization is progress by RESET signal.
0: chip is active, 1: chip is being reset
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