S-814A30AMC-BCUT2G 查看數據表（PDF） - Seiko Instruments Inc

零件编号

产品描述 (功能)

生产厂家

S-814A30AMC-BCUT2G

LOW DROPOUT CMOS VOLTAGE REGULATOR

Seiko Instruments Inc 

LOW DROPOUT CMOS VOLTAGE REGULATOR

S-814 Series

Rev.2.1_00

„ Operation

1. Basic operation

Figure 12 shows the block diagram of the S-814 Series.

The error amplifier compares a reference voltage Vref with part of the output voltage divided by the

feedback resistors Rs and Rf. It supplies the output transistor with the gate voltage, necessary to ensure

certain output voltage free of any fluctuations of input voltage and temperature.

VIN

Current source

Vref

Error amplifier

−

+

*1

Rf

VOUT

Reference voltage

circuit

VSS

*1. Parasitic diode

Rs

Figure 12

2. Output transistor

The S-814 Series uses a low on-resistance Pch MOS FET as the output transistor.

Be sure that VOUT does not exceed VIN+0.3 V to prevent the voltage regulator from being broken due to

inverse current flowing from VOUT pin through a parasitic diode to VIN pin.

12

Seiko Instruments Inc.

Share Link: