LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
Rev.1.2
(3) Power fluctuation
VIN=4→10V IOUT=30mA
10V
VIN
4V
VOUT
CL=2µF
CL=4.7µF
3V
TIME(50usec/div)
Load dependence of overshoot
VIN=VOUT(S)+1V→VOUT(S)+2V,CL=2µF
0.6
0.4
VOUT=2V
0.2
3V
5V
0
1.E-05 1.E-04 1.E-03 1.E-02 1.E-01 1.E+00
IOUT(A)
VDD dependence of overshoot
VIN=VOUT(S)+1V→VDD, IOUT=30mA,CL=2µF
0.6
3V
0.4
VOUT=2V
0.2
5V
0
0
2
4
6
8
10
VDD(V)
10V
VIN
4V
VIN=10→4V IOUT=30mA
VOUT
3V
CL=4.7µF
CL=2µF
TIME(50usec/div)
Output capacitor (CL) dependence of overshoot
VIN=VOUT(S)+1V→VOUT(S)+2V, IOUT=30mA
0.05
0.04
0.03
VOUT=2V
3V
0.02
0.01
5V
0
1
10
100
CL(uF)
Temperature dependence of overshoot
VIN=VOUT(S)+1V→VOUT(S)+2V, IOUT=30mA,CL=2µF
0.06
0.05
0.04
3V
VOUT=2V
0.03
0.02
0.01
0
-50
5V
0
50
100
Ta°C
16
Seiko Instruments Inc.