SST32HF1681-70-4C-LS 查看數據表（PDF） - Silicon Storage Technology
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SST32HF1681-70-4C-LS Datasheet PDF : 36 Pages
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Preliminary Specifications
ADDRESSES AMSS3-0
WE#
BES1#
Multi-Purpose Flash Plus + SRAM ComboMemory
SST32HF1641 / SST32HF1681 / SST32HF3241 / SST32HF3281
SST32HF1621C / SST32HF1641C / SST32HF3241C
TASTS
TWCS
TWPS
TAWS
TBWS
TWRS
BES2
TBWS
UBS#, LBS#
DQ15-8, DQ7-0
TODWS
NOTE 2
TBYWS
TDSS
TOEWS
TDHS
VALID DATA IN
NOTE 2
1236 F04.1
Note: 1. If OE# is High during the Write cycle, the outputs will remain at high impedance.
2. If BES1# goes Low or BES2 goes high coincident with or after WE# goes Low, the output will remain at high impedance.
If BES1# goes High or BES2 goes low coincident with or before WE# goes High, the output will remain at high impedance.
Because DIN signals may be in the output state at this time, input signals of reverse polarity must not be applied.
3. AMSS = Most Significant SRAM Address
AMSS = A16 for SST32HF1621C, A17 for SST32HFxx41x and A18 for SST32HFxx81
FIGURE 4: SRAM WRITE CYCLE TIMING DIAGRAM (WE# CONTROLLED)1
©2005 Silicon Storage Technology, Inc.
16
S71236-04-000
5/05
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