PIC16LC73T-10I/SS 查看數據表（PDF） - Microchip Technology
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PIC16LC73T-10I/SS Datasheet PDF : 288 Pages
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PIC16C7X
Applicable Devices 72 73 73A 74 74A 76 77
FIGURE 19-3: CLKOUT AND I/O TIMING
OSC1
Q4
Q1
10
Q2
Q3
11
CLKOUT
I/O Pin
(input)
13
14
17
19 18
15
12
16
I/O Pin
(output)
old value
new value
20, 21
Note: Refer to Figure 19-1 for load conditions.
TABLE 19-3: CLKOUT AND I/O TIMING REQUIREMENTS
Param Sym
No.
Characteristic
Min
Typ†
Max
Units Conditions
10* TosH2ckL OSC1↑ to CLKOUT↓
—
75
200
ns
11* TosH2ckH OSC1↑ to CLKOUT↑
—
75
200
ns
12* TckR
CLKOUT rise time
—
35
100
ns
13* TckF
CLKOUT fall time
—
35
100
ns
14* TckL2ioV CLKOUT ↓ to Port out valid
—
— 0.5TCY + 20 ns
15* TioV2ckH Port in valid before CLKOUT ↑
TOSC + 200 —
—
ns
16* TckH2ioI Port in hold after CLKOUT ↑
0
—
—
ns
17* TosH2ioV OSC1↑ (Q1 cycle) to
Port out valid
—
50
150
ns
18* TosH2ioI OSC1↑ (Q2 cycle) to
PIC16C73A/74A
Port input invalid (I/O in PIC16LC73A/74A
hold time)
100
—
—
ns
200
—
—
ns
19* TioV2osH Port input valid to OSC1↑ (I/O in setup time)
0
—
—
ns
20* TioR
Port output rise time
PIC16C73A/74A
—
10
40
ns
PIC16LC73A/74A
—
—
80
ns
21* TioF
Port output fall time
PIC16C73A/74A
—
10
40
ns
PIC16LC73A/74A
—
—
80
ns
22††* Tinp
INT pin high or low time
TCY
—
—
ns
23††* Trbp
RB7:RB4 change INT high or low time
TCY
—
—
ns
* These parameters are characterized but not tested.
†Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance
only and are not tested.
†† These parameters are asynchronous events not related to any internal clock edges.
Note 1: Measurements are taken in RC Mode where CLKOUT output is 4 x TOSC.
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
DS30390E-page 208
© 1997 Microchip Technology Inc.
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