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PIC16C72-10I/SS 查看數據表(PDF) - Microchip Technology

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PIC16C72-10I/SS
Microchip
Microchip Technology 
PIC16C72-10I/SS Datasheet PDF : 288 Pages
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PIC16C7X
FIGURE 9-2: T2CON: TIMER2 CONTROL REGISTER (ADDRESS 12h)
U-0
bit7
bit 7:
bit 6-3:
bit 2:
bit 1-0:
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0
bit0
Unimplemented: Read as '0'
TOUTPS3:TOUTPS0: Timer2 Output Postscale Select bits
0000 = 1:1 Postscale
0001 = 1:2 Postscale
1111 = 1:16 Postscale
TMR2ON: Timer2 On bit
1 = Timer2 is on
0 = Timer2 is off
T2CKPS1:T2CKPS0: Timer2 Clock Prescale Select bits
00 = Prescaler is 1
01 = Prescaler is 4
1x = Prescaler is 16
R = Readable bit
W = Writable bit
U = Unimplemented bit,
read as ‘0’
- n = Value at POR reset
TABLE 9-1: REGISTERS ASSOCIATED WITH TIMER2 AS A TIMER/COUNTER
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR,
BOR
Value on
all other
resets
0Bh,8Bh, INTCON GIE
10Bh,18Bh
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF 0000 000x 0000 000u
0Ch
PIR1
PSPIF(1,2) ADIF
RCIF(2)
TXIF(2)
SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
8Ch
PIE1
PSPIE(1,2) ADIE
RCIE(2) TXIE(2) SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
11h
TMR2 Timer2 module’s register
0000 0000 0000 0000
12h
T2CON
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
92h
PR2
Timer2 Period Register
1111 1111 1111 1111
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by the Timer2 module.
Note 1: Bits PSPIE and PSPIF are reserved on the PIC16C73/73A/76, always maintain these bits clear.
2: The PIC16C72 does not have a Parallel Slave Port or a USART, these bits are unimplemented, read as '0'.
DS30390E-page 70
© 1997 Microchip Technology Inc.

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