ST72334N2(2003) 查看數據表（PDF） - STMicroelectronics
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产品描述 (功能)
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ST72334N2
(Rev.:2003)
(Rev.:2003)
STMicroelectronics
ST72334N2 Datasheet PDF : 153 Pages
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ST72334J/N, ST72314J/N, ST72124J
SUPPLY CURRENT CHARACTERISTICS (Cont’d)
16.4.2 WAIT and SLOW WAIT Modes
Symbol
Parameter
Supply current in WAIT mode 3)
(see Figure 65)
Supply current in SLOW WAIT mode 4)
(see Figure 66)
IDD
Supply current in WAIT mode 3)
(see Figure 65)
Supply current in SLOW WAIT mode 4)
(see Figure 66)
Conditions
fOSC=2MHz, fCPU=1MHz
fOSC=4MHz, fCPU=2MHz
fOSC=8MHz, fCPU=4MHz
fOSC=16MHz, fCPU=8MHz
fOSC=2MHz, fCPU=62.5kHz
fOSC=4MHz, fCPU=125kHz
fOSC=8MHz, fCPU=250kHz
fOSC=16MHz, fCPU=500kHz
fOSC=2MHz, fCPU=1MHz
fOSC=4MHz, fCPU=2MHz
fOSC=8MHz, fCPU=4MHz
fOSC=16MHz, fCPU=8MHz
fOSC=2MHz, fCPU=62.5kHz
fOSC=4MHz, fCPU=125kHz
fOSC=8MHz, fCPU=250kHz
fOSC=16MHz, fCPU=500kHz
Typ 1)
0.35
0.7
1.3
2.5
0.05
0.1
0.2
0.5
45
150
300
500
6
40
80
120
Max 2)
0.6
1.2
2.1
4.0
0.1
0.2
0.4
1.0
100
300
600
1000
20
100
160
250
Unit
mA
µA
Figure 65. Typical IDD in WAIT vs. fCPU
Figure 66. Typical IDD in SLOW-WAIT vs. fCPU
IDD [mA]
3
2.5
8MHz
4MHz
2MHz
1MHz
2
1.5
1
0.5
0
3.2 3.5
4
4.5
5
5.5
VDD [V]
IDD [mA]
0.35
0.3
500kHz
250kHz
125kHz
62.5kHz
0.25
0.2
0.15
0.1
0.05
0
3.2 3.5
4
4.5
VDD [V]
5
5.5
Notes:
1. Typical data are based on TA=25°C, VDD=5V (4.5V≤VDD≤5.5V range) and VDD=3.4V (3.2V≤VDD≤3.6V range).
2. Data based on characterization results, tested in production at VDD max. and fCPU max.
3. All I/O pins in input mode with a static value at VDD or VSS (no load), all peripherals in reset state; clock input (OSC1)
driven by external square wave, CSS and LVD disabled.
4. SLOW-WAIT mode selected with fCPU based on fOSC divided by 32. All I/O pins in input mode with a static value at
VDD or VSS (no load), all peripherals in reset state; clock input (OSC1) driven by external square wave, CSS and LVD
disabled.
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