PIC16LC717T-I/SO 查看數據表（PDF） - Microchip Technology

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PIC16LC717T-I/SO

18/20-Pin, 8-Bit CMOS Microcontrollers with 10/12-Bit A/D

Microchip Technology 

PIC16C717/770/771

15.3 DC Characteristics: PIC16C717/770/771 & PIC16LC717/770/771 (Commercial, Industrial)

DC CHARACTERISTICS

Param Sym

No.

Characteristic

Standard Operating Conditions (unless otherwise stated)

Operating temperature -40°C ≤ TA ≤ +85°C for industrial and

0°C ≤ TA ≤ +70°C for commercial

Operating voltage VDD range as described in DC spec Section 15.1

and Section 15.2.

Min Typ† Max Units

Conditions

Input Low Voltage

VIL I/O ports

D030

with TTL buffer

VSS

— 0.15VDD V For entire VDD range

D030A

VSS

—

0.8V

V 4.5V ≤ VDD ≤ 5.5V

D031

with Schmitt Trigger buffer

VSS

— 0.2VDD V For entire VDD range

D032

MCLR

VSS

— 0.2VDD V

D033

OSC1 (in XT, HS, LP and EC)

VSS

— 0.3VDD V

Input High Voltage

VIH I/O ports

—

with TTL buffer

D040

2.0

—

VDD

V 4.5V ≤ VDD ≤ 5.5V

D040A

(0.25VDD —

VDD

V For entire VDD range

+ 0.8V)

D041

with Schmitt Trigger buffer

0.8VDD —

VDD

V For entire VDD range

D042

MCLR

0.8VDD —

VDD

V

D042A

OSC1 (XT, HS, LP and EC)

0.7VDD —

VDD

V

D070

IPURB PORTB weak pull-up current per pin

50

250 400

µA VDD = 5V, VPIN = VSS

Input Leakage Current (1,2)

D060

IIL I/O ports (with digital functions)

—

—

±1

µA Vss ≤ VPIN ≤ VDD, Pin at hi-imped-

ance

D060A

IIL I/O ports (with analog functions)

—

—

±100

nA Vss ≤ VPIN ≤ VDD, Pin at hi-imped-

ance

D061

RA5/MCLR/VPP

—

—

±5

µA Vss ≤ VPIN ≤ VDD

D063

OSC1

—

—

±5

µA Vss ≤ VPIN ≤ VDD, XT, HS, LP and EC

osc configuration

Output Low Voltage

D080

VOL I/O ports

—

—

0.6

V IOL = 8.5 mA, VDD = 4.5V

Output High Voltage

D090

VOH I/O ports(2)

VDD - 0.7 —

—

V IOH = -3.0 mA, VDD = 4.5V

D150*

VOD Open-Drain High Voltage

—

—

10.5

V RA4 pin

Capacitive Loading Specs on Out-

put Pins*

D100 COSC2 OSC2 pin

—

—

15

pF In XT, HS and LP modes when exter-

nal clock is used to drive OSC1.

D101

CIO All I/O pins and OSC2 (in RC mode)

—

—

50

pF

D102

CB SCL, SDA in I2C mode

—

—

400

pF

CVRH VRH pin

—

—

200

pF VRH output enabled

CVRL VRL pin

—

—

200

pF VRL output enabled

* These parameters are characterized but not tested.

† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not

tested.

Note 1: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent nor-

mal operating conditions. Higher leakage current may be measured at different input voltages.

2: Negative current is defined as current sourced by the pin.

DS41120A-page 160

Advanced Information

© 1999 Microchip Technology Inc.

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