PIC16LC717T-I/SO 查看數據表（PDF） - Microchip Technology

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PIC16LC717T-I/SO

18/20-Pin, 8-Bit CMOS Microcontrollers with 10/12-Bit A/D

Microchip Technology 

PIC16C717/770/771

2.2.2.6 PIE2 REGISTER

This register contains the individual enable bits for the

SSP bus collision and low voltage detect interrupts.

REGISTER 2-6: PERIPHERAL INTERRUPT REGISTER 2 (PIE2: 8Dh)

R/W-0

U-0

U-0

U-0

R/W-0

U-0

LVDIE

—

—

—

BCLIE

—

bit7

bit 7:

LVDIE: Low-voltage Detect Interrupt Enable bit

1 = LVD Interrupt is enabled

0 = LVD Interrupt is disabled

bit 6-4: Unimplemented: Read as ’0’

bit 3:

BCLIE: Bus Collision Interrupt Enable bit

1 = Bus Collision interrupt is enabled

0 = Bus Collision interrupt is disabled

bit 2-0: Unimplemented: Read as ’0’

U-0

U-0

—

—

R = Readable bit

bit0 W = Writable bit

U = Unimplemented bit,

read as ‘0’

- n = Value at POR reset

© 1999 Microchip Technology Inc.

Advanced Information

DS41120A-page 21

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