ST72324J6TC 查看數據表（PDF） - STMicroelectronics

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ST72324J6TC

8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE

STMicroelectronics 

ST72324

EMC CHARACTERISTICS (Cont’d)

True Open Drain Pin Protection

The centralized protection (4) is not involved in the

discharge of the ESD stresses applied to true

open drain pads due to the fact that a P-Buffer and

diode to VDD are not implemented. An additional

local protection between the pad and VSS (5a &

5b) is implemented to completely absorb the posi-

tive ESD discharge.

Multisupply Configuration

When several types of ground (VSS, VSSA, ...) and

power supply (VDD, VAREF, ...) are available for

any reason (better noise immunity...), the structure

shown in Figure 76 is implemented to protect the

device against ESD.

Figure 74. Positive Stress on a True Open Drain Pad vs. VSS

VDD

VDD

Main path

Path to avoid

(1)

OUT

(4)

IN

(5a)

(3b)

(2b)

(5b)

VSS

Figure 75. Negative Stress on a True Open Drain Pad vs. VDD

VDD

Main path

OUT

(4)

IN

(3b)

(3b)

VSS

VDD

(1)

(2b)

(3b)

VSS

Figure 76. Multisupply Configuration

VDD

VSS

VAREF

VAREF

VSS

VSSA

BACK TO BACK DIODE

BETWEEN GROUNDS

VSSA

134/161

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