DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

ST7FMC1M2T3 查看數據表(PDF) - STMicroelectronics

零件编号
产品描述 (功能)
生产厂家
ST7FMC1M2T3 Datasheet PDF : 309 Pages
First Prev 131 132 133 134 135 136 137 138 139 140 Next Last
ST7MC1xx/ST7MC2xx
LINSCISERIAL COMMUNICATION INTERFACE (LIN Mode) (cont’d)
LIN PRESCALER FRACTION REGISTER
will effectively update LDIV and so the clock gen-
(LPFR)
eration.
Read/Write
Reset Value: 0000 0000 (00h)
2. In LIN Slave mode, if the LPR[7:0] register is
equal to 00h, the transceiver and receiver input
7
0
clocks are switched off.
0
0
0
0
LPFR LPFR LPFR LPFR
3
2
1
0
Bits 7:4 = Reserved.
Bits 3:0 = LPFR[3:0] Fraction of LDIV
These 4 bits define the fraction of the LIN Divider
(LDIV):
LPFR[3:0]
0h
1h
...
Eh
Fh
Fraction (LDIV)
0
1/16
...
14/16
15/16
1. When initializing LDIV, the LPFR register must
be written first. Then, the write to the LPR register
Examples of LDIV coding:
Example 1: LPR = 27d and LPFR = 12d
This leads to:
Mantissa (LDIV) = 27d
Fraction (LDIV) = 12/16 = 0.75d
Therefore LDIV = 27.75d
Example 2: LDIV = 25.62d
This leads to:
LPFR = rounded(16*0.62d)
= rounded(9.92d) = 10d = Ah
LPR = mantissa (25.620d) = 25d = 1Bh
Example 3: LDIV = 25.99d
This leads to:
LPFR = rounded(16*0.99d)
= rounded(15.84d) = 16d
135/309
1

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]