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ST7MC2N6 查看數據表(PDF) - STMicroelectronics

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ST7MC2N6 Datasheet PDF : 309 Pages
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ST7MC1xx/ST7MC2xx
OP-AMP MODULE (Cont’d)
10.7.6 Low power modes
Note: The Op-Amp can be disabled by resetting
the OAON bit. This feature allows reduced power
consumption when the amplifier is not used.
Mode
Wait
Halt
Description
No effect on Op-Amp
Op-Amp disabled
After wake-up from Halt mode, the Op-
Amp requires a stabilization time (see
Electrical characteristics) (to be defined)
10.7.7 Interrupts
None.
10.7.8 Register Description
CONTROL/STATUS REGISTER (OACSR)
Read/Write (except bit 7 read only)
Reset Value: 0000 0000(00h)
7
6
5
4
321
0
CMP OFF AVG OAO HIGH 0
0
0
OVR CMP CMP N GAIN
Bit 7 = CMPOVR Compensation Completed
This read-only bit contains the offset compensa-
tion status.
0: No offset compensation if OFFCMP = 0, or
Offset compensation cycle not completed if
OFFCMP = 1
1: Offset compensation completed if OFFCMP = 1
Bit 6 = OFFCMP Offset Compensation
0: Reset offset compensation values
1: Request to start offset compensation
Bit 5 = AVGCMP Average Compensation
0: One-shot offset compensation
1: Average offset compensation over 16 times
Bit 4 = OAON Amplifier On
0: Op-Amp powered off
1: Op-Amp on
Bit 3 = HIGHGAIN Gain range selection
This bit must be programmed depending on the
application. It can be used to ensure 35dB open
loop gain when high, it must be low when the
closed loop gain is below 20dB for stability rea-
sons.
0: Closed loop gain up to 20dB
1: Closed loop gain more than 20dB
Bits 2:0 = Reserved, must be kept cleared.
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