ST92195C/D 查看數據表（PDF） - STMicroelectronics

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ST92195C/D

48-96 Kbyte ROM HCMOS MCU WITH ON-SCREEN DISPLAY AND TELETEXT DATA SLICER

STMicroelectronics 

ST92E195C/D-ST92T195C/D - GENERAL DESCRIPTION

INTRODUCTION (Cont’d)

Figure 117. ST92E195C/D-ST92T195C/D Block Diagram

Up to 84 Kbytes

EPROM

512 bytes

RAM

8 Kbytes

TDSRAM TRI

I/O

PORT 0

I/O

PORT 2

I/O

PORT 3

8 P0[7:0]

6

P2[5:0]

4 P3[7:4]

NMI

INT[7:4]

INT2

INT0

OSCIN

OSCOUT

RESET

RESETO

SDO/SDI

SCK

MCFM

VSO[2:1]

STOUT0

SDA1/SCL1

SDA2/SCL2

256 bytes

Register File

8/16-bit

CPU

MMU

Interrupt

Management

ST9+ CORE

RCCU

16-BIT

TIMER/

WATCHDOG

SPI

TIMING AND

CLOCK CTRL

VOLTAGE

SYNTHESIS

STANDARD

TIMERS 1)

I²C

I/O

PORT 4

8

P4[7:0]

I/O

PORT 5

2 P5[1:0]

DATA

SLICER

& ACQUI-

SITION

UNIT

SYNC.

EXTRAC-

TION

VPS/WSS

DATA

SLICER

ADC

TXCF

CVBS1

WSCR

WSCF

CVBS2

AIN[4:1]

EXTRG

SYNC

CONTROL

ON

SCREEN

DISPLAY

PWM

D/A CON-

VERTER

VSYNC

HSYNC/CSYNC

CSO

FREQ.

MULTIP.

PXFM

R/G/B/FB

TSLU

HT

PWM[7:0]

All alternate functions (Italic characters) are mapped on Ports 0, 2, 3, 4 and 5

Note 1: Two standard timers

222/249

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