ST92195C/D 查看數據表（PDF） - STMicroelectronics

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ST92195C/D

48-96 Kbyte ROM HCMOS MCU WITH ON-SCREEN DISPLAY AND TELETEXT DATA SLICER

STMicroelectronics 

ST92195C/D - DEVICE ARCHITECTURE

MMU REGISTERS (Cont’d)

Figure 18. Memory Addressing Scheme (example)

4M bytes

3FFFFFh

DPR3

DPR2

DPR1

DPR0

16K

294000h

240000h

23FFFFh

16K

20C000h

16K

200000h

1FFFFFh

DMASR

ISR

CSR

040000h

03FFFFh

64K

030000h

020000h

64K

010000h

16K

00C000h

64K

000000h

42/249

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