ST92163R4T1L 查看數據表（PDF） - STMicroelectronics

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ST92163R4T1L

8/16-BIT FULL SPEED USB MCU FOR COMPOSITE DEVICES WITH 16 ENDPOINTS, 20K ROM, 2K RAM, I2C, SCI, & MFT

STMicroelectronics 

ST92163 - ELECTRICAL CHARACTERISTICS

WAKE-UP MANAGEMENT TIMING TABLE

(VDD = 3.0 - 5.5V (1), TA = 0°C + 70°C, CLoad = 50pF, fINTCLK = 24MHz, unless otherwise specified)

N° Symbol

Parameter

Value (Note)

Fo rmul a(2)

Min

Unit

Max

1 TwWKPLR Low Level Pulse Width in Rising Edge Mode

≥ Tck+10

50

ns

2 TwWKPHR High Level Pulse Width in Rising Edge Mode

≥ Tck+10

50

ns

3 TwWKPHF High Level Pulse Width in Falling Edge Mode

≥ Tck+10

50

ns

4 TwWKPLF Low Level Pulse Width in Falling Edge Mode

≥ Tck+10

50

ns

Note: The value in the left hand column shows the formula used to calculate the timing minimum or maximum from the oscillator clock period.

The value in the right hand two columns show the timing minimum and maximum for an internal clock at 24MHz (INTCLK).

The given data are related to Wake-up Management Unit used in External Interrupt mode.

(1) 3.0 - 4.0V voltage range is only available on devices with suffix L or V, with different frequency limitatio ns (L: 8 MHz, V: 16 MHz)

(2) Formula guaranteed by design.

Legend:

Tck = INTCLK period = OSCIN period when OSCIN is not divided by 2;

2 x OSCIN period when OSCIN is divided by 2;

OSCIN period x PLL factor when the PLL is enabled.

WAKE-UP MANAGEMENT TIMING

WKU Pn

n=0–15

209/224

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